1 ;-------------------------------------------------------- 2 ; File Created by SDCC : free open source ANSI-C Compiler 3 ; Version 3.2.0 #8008 (Jul 6 2012) (MINGW32) 4 ; This file was generated Fri Oct 02 12:35:58 2015 5 ;-------------------------------------------------------- 6 .module new 7 .optsdcc -mmcs51 --model-small 8 9 ;-------------------------------------------------------- 10 ; Public variables in this module 11 ;-------------------------------------------------------- 12 .globl _main 13 .globl _SetVector 14 .globl _T0_ISR 15 .globl _T1_ISR 16 .globl _delay 17 .globl _leds 18 .globl _write_max 19 .globl _SPR0 20 .globl _SPR1 21 .globl _CPHA 22 .globl _CPOL 23 .globl _SPIM 24 .globl _SPE 25 .globl _WCOL 26 .globl _ISPI 27 .globl _I2CI 28 .globl _I2CTX 29 .globl _I2CRS 30 .globl _I2CM 31 .globl _MDI 32 .globl _MCO 33 .globl _MDE 34 .globl _MDO 35 .globl _CS0 36 .globl _CS1 37 .globl _CS2 38 .globl _CS3 39 .globl _SCONV 40 .globl _CCONV 41 .globl _DMA 42 .globl _ADCI 43 .globl _P 44 .globl _F1 45 .globl _OV 46 .globl _RS0 47 .globl _RS1 48 .globl _F0 49 .globl _AC 50 .globl _CY 51 .globl _CAP2 52 .globl _CNT2 53 .globl _TR2 54 .globl _XEN 55 .globl _TCLK 56 .globl _RCLK 57 .globl _EXF2 58 .globl _TF2 59 .globl _WDE 60 .globl _WDS 61 .globl _WDR2 62 .globl _WDR1 63 .globl _PRE0 64 .globl _PRE1 65 .globl _PRE2 66 .globl _PX0 67 .globl _PT0 68 .globl _PX1 69 .globl _PT1 70 .globl _PS 71 .globl _PT2 72 .globl _PADC 73 .globl _PSI 74 .globl _RXD 75 .globl _TXD 76 .globl _INT0 77 .globl _INT1 78 .globl _T0 79 .globl _T1 80 .globl _WR 81 .globl _RD 82 .globl _EX0 83 .globl _ET0 84 .globl _EX1 85 .globl _ET1 86 .globl _ES 87 .globl _ET2 88 .globl _EADC 89 .globl _EA 90 .globl _RI 91 .globl _TI 92 .globl _RB8 93 .globl _TB8 94 .globl _REN 95 .globl _SM2 96 .globl _SM1 97 .globl _SM0 98 .globl _T2 99 .globl _T2EX 100 .globl _IT0 101 .globl _IE0 102 .globl _IT1 103 .globl _IE1 104 .globl _TR0 105 .globl _TF0 106 .globl _TR1 107 .globl _TF1 108 .globl _DACCON 109 .globl _DAC1H 110 .globl _DAC1L 111 .globl _DAC0H 112 .globl _DAC0L 113 .globl _SPICON 114 .globl _SPIDAT 115 .globl _ADCCON3 116 .globl _ADCGAINH 117 .globl _ADCGAINL 118 .globl _ADCOFSH 119 .globl _ADCOFSL 120 .globl _B 121 .globl _ADCCON1 122 .globl _I2CCON 123 .globl _ACC 124 .globl _PSMCON 125 .globl _ADCDATAH 126 .globl _ADCDATAL 127 .globl _ADCCON2 128 .globl _DMAP 129 .globl _DMAH 130 .globl _DMAL 131 .globl _PSW 132 .globl _TH2 133 .globl _TL2 134 .globl _RCAP2H 135 .globl _RCAP2L 136 .globl _T2CON 137 .globl _EADRL 138 .globl _WDCON 139 .globl _EDATA4 140 .globl _EDATA3 141 .globl _EDATA2 142 .globl _EDATA1 143 .globl _ETIM3 144 .globl _ETIM2 145 .globl _ETIM1 146 .globl _ECON 147 .globl _IP 148 .globl _P3 149 .globl _IE2 150 .globl _IE 151 .globl _P2 152 .globl _I2CADD 153 .globl _I2CDAT 154 .globl _SBUF 155 .globl _SCON 156 .globl _P1 157 .globl _TH1 158 .globl _TH0 159 .globl _TL1 160 .globl _TL0 161 .globl _TMOD 162 .globl _TCON 163 .globl _PCON 164 .globl _DPP 165 .globl _DPH 166 .globl _DPL 167 .globl _SP 168 .globl _P0 169 .globl _k 170 .globl _t 171 .globl _i 172 ;-------------------------------------------------------- 173 ; special function registers 174 ;-------------------------------------------------------- 175 .area RSEG (ABS,DATA) 0000 176 .org 0x0000 0080 177 _P0 = 0x0080 0081 178 _SP = 0x0081 0082 179 _DPL = 0x0082 0083 180 _DPH = 0x0083 0084 181 _DPP = 0x0084 0087 182 _PCON = 0x0087 0088 183 _TCON = 0x0088 0089 184 _TMOD = 0x0089 008A 185 _TL0 = 0x008a 008B 186 _TL1 = 0x008b 008C 187 _TH0 = 0x008c 008D 188 _TH1 = 0x008d 0090 189 _P1 = 0x0090 0098 190 _SCON = 0x0098 0099 191 _SBUF = 0x0099 009A 192 _I2CDAT = 0x009a 009B 193 _I2CADD = 0x009b 00A0 194 _P2 = 0x00a0 00A8 195 _IE = 0x00a8 00A9 196 _IE2 = 0x00a9 00B0 197 _P3 = 0x00b0 00B8 198 _IP = 0x00b8 00B9 199 _ECON = 0x00b9 00BA 200 _ETIM1 = 0x00ba 00BB 201 _ETIM2 = 0x00bb 00C4 202 _ETIM3 = 0x00c4 00BC 203 _EDATA1 = 0x00bc 00BD 204 _EDATA2 = 0x00bd 00BE 205 _EDATA3 = 0x00be 00BF 206 _EDATA4 = 0x00bf 00C0 207 _WDCON = 0x00c0 00C6 208 _EADRL = 0x00c6 00C8 209 _T2CON = 0x00c8 00CA 210 _RCAP2L = 0x00ca 00CB 211 _RCAP2H = 0x00cb 00CC 212 _TL2 = 0x00cc 00CD 213 _TH2 = 0x00cd 00D0 214 _PSW = 0x00d0 00D2 215 _DMAL = 0x00d2 00D3 216 _DMAH = 0x00d3 00D4 217 _DMAP = 0x00d4 00D8 218 _ADCCON2 = 0x00d8 00D9 219 _ADCDATAL = 0x00d9 00DA 220 _ADCDATAH = 0x00da 00DF 221 _PSMCON = 0x00df 00E0 222 _ACC = 0x00e0 00E8 223 _I2CCON = 0x00e8 00EF 224 _ADCCON1 = 0x00ef 00F0 225 _B = 0x00f0 00F1 226 _ADCOFSL = 0x00f1 00F2 227 _ADCOFSH = 0x00f2 00F3 228 _ADCGAINL = 0x00f3 00F4 229 _ADCGAINH = 0x00f4 00F5 230 _ADCCON3 = 0x00f5 00F7 231 _SPIDAT = 0x00f7 00F8 232 _SPICON = 0x00f8 00F9 233 _DAC0L = 0x00f9 00FA 234 _DAC0H = 0x00fa 00FB 235 _DAC1L = 0x00fb 00FC 236 _DAC1H = 0x00fc 00FD 237 _DACCON = 0x00fd 238 ;-------------------------------------------------------- 239 ; special function bits 240 ;-------------------------------------------------------- 241 .area RSEG (ABS,DATA) 0000 242 .org 0x0000 008F 243 _TF1 = 0x008f 008E 244 _TR1 = 0x008e 008D 245 _TF0 = 0x008d 008C 246 _TR0 = 0x008c 008B 247 _IE1 = 0x008b 008A 248 _IT1 = 0x008a 0089 249 _IE0 = 0x0089 0088 250 _IT0 = 0x0088 0091 251 _T2EX = 0x0091 0090 252 _T2 = 0x0090 009F 253 _SM0 = 0x009f 009E 254 _SM1 = 0x009e 009D 255 _SM2 = 0x009d 009C 256 _REN = 0x009c 009B 257 _TB8 = 0x009b 009A 258 _RB8 = 0x009a 0099 259 _TI = 0x0099 0098 260 _RI = 0x0098 00AF 261 _EA = 0x00af 00AE 262 _EADC = 0x00ae 00AD 263 _ET2 = 0x00ad 00AC 264 _ES = 0x00ac 00AB 265 _ET1 = 0x00ab 00AA 266 _EX1 = 0x00aa 00A9 267 _ET0 = 0x00a9 00A8 268 _EX0 = 0x00a8 00B7 269 _RD = 0x00b7 00B6 270 _WR = 0x00b6 00B5 271 _T1 = 0x00b5 00B4 272 _T0 = 0x00b4 00B3 273 _INT1 = 0x00b3 00B2 274 _INT0 = 0x00b2 00B1 275 _TXD = 0x00b1 00B0 276 _RXD = 0x00b0 00BF 277 _PSI = 0x00bf 00BE 278 _PADC = 0x00be 00BD 279 _PT2 = 0x00bd 00BC 280 _PS = 0x00bc 00BB 281 _PT1 = 0x00bb 00BA 282 _PX1 = 0x00ba 00B9 283 _PT0 = 0x00b9 00B8 284 _PX0 = 0x00b8 00C7 285 _PRE2 = 0x00c7 00C6 286 _PRE1 = 0x00c6 00C5 287 _PRE0 = 0x00c5 00C3 288 _WDR1 = 0x00c3 00C2 289 _WDR2 = 0x00c2 00C1 290 _WDS = 0x00c1 00C0 291 _WDE = 0x00c0 00CF 292 _TF2 = 0x00cf 00CE 293 _EXF2 = 0x00ce 00CD 294 _RCLK = 0x00cd 00CC 295 _TCLK = 0x00cc 00CB 296 _XEN = 0x00cb 00CA 297 _TR2 = 0x00ca 00C9 298 _CNT2 = 0x00c9 00C8 299 _CAP2 = 0x00c8 00D7 300 _CY = 0x00d7 00D6 301 _AC = 0x00d6 00D5 302 _F0 = 0x00d5 00D4 303 _RS1 = 0x00d4 00D3 304 _RS0 = 0x00d3 00D2 305 _OV = 0x00d2 00D1 306 _F1 = 0x00d1 00D0 307 _P = 0x00d0 00DF 308 _ADCI = 0x00df 00DE 309 _DMA = 0x00de 00DD 310 _CCONV = 0x00dd 00DC 311 _SCONV = 0x00dc 00DB 312 _CS3 = 0x00db 00DA 313 _CS2 = 0x00da 00D9 314 _CS1 = 0x00d9 00D8 315 _CS0 = 0x00d8 00EF 316 _MDO = 0x00ef 00EE 317 _MDE = 0x00ee 00ED 318 _MCO = 0x00ed 00EC 319 _MDI = 0x00ec 00EB 320 _I2CM = 0x00eb 00EA 321 _I2CRS = 0x00ea 00E9 322 _I2CTX = 0x00e9 00E8 323 _I2CI = 0x00e8 00FF 324 _ISPI = 0x00ff 00FE 325 _WCOL = 0x00fe 00FD 326 _SPE = 0x00fd 00FC 327 _SPIM = 0x00fc 00FB 328 _CPOL = 0x00fb 00FA 329 _CPHA = 0x00fa 00F9 330 _SPR1 = 0x00f9 00F8 331 _SPR0 = 0x00f8 332 ;-------------------------------------------------------- 333 ; overlayable register banks 334 ;-------------------------------------------------------- 335 .area REG_BANK_0 (REL,OVR,DATA) 0000 336 .ds 8 337 ;-------------------------------------------------------- 338 ; overlayable bit register bank 339 ;-------------------------------------------------------- 340 .area BIT_BANK (REL,OVR,DATA) 0000 341 bits: 0000 342 .ds 1 8000 343 b0 = bits[0] 8100 344 b1 = bits[1] 8200 345 b2 = bits[2] 8300 346 b3 = bits[3] 8400 347 b4 = bits[4] 8500 348 b5 = bits[5] 8600 349 b6 = bits[6] 8700 350 b7 = bits[7] 351 ;-------------------------------------------------------- 352 ; internal ram data 353 ;-------------------------------------------------------- 354 .area DSEG (DATA) 0000 355 _i:: 0000 356 .ds 2 0002 357 _t:: 0002 358 .ds 1 0003 359 _k:: 0003 360 .ds 1 361 ;-------------------------------------------------------- 362 ; overlayable items in internal ram 363 ;-------------------------------------------------------- 364 ;-------------------------------------------------------- 365 ; Stack segment in internal ram 366 ;-------------------------------------------------------- 367 .area SSEG (DATA) 0000 368 __start__stack: 0000 369 .ds 1 370 371 ;-------------------------------------------------------- 372 ; indirectly addressable internal ram data 373 ;-------------------------------------------------------- 374 .area ISEG (DATA) 375 ;-------------------------------------------------------- 376 ; absolute internal ram data 377 ;-------------------------------------------------------- 378 .area IABS (ABS,DATA) 379 .area IABS (ABS,DATA) 380 ;-------------------------------------------------------- 381 ; bit data 382 ;-------------------------------------------------------- 383 .area BSEG (BIT) 384 ;-------------------------------------------------------- 385 ; paged external ram data 386 ;-------------------------------------------------------- 387 .area PSEG (PAG,XDATA) 388 ;-------------------------------------------------------- 389 ; external ram data 390 ;-------------------------------------------------------- 391 .area XSEG (XDATA) 392 ;-------------------------------------------------------- 393 ; absolute external ram data 394 ;-------------------------------------------------------- 395 .area XABS (ABS,XDATA) 396 ;-------------------------------------------------------- 397 ; external initialized ram data 398 ;-------------------------------------------------------- 399 .area XISEG (XDATA) 400 .area HOME (CODE) 401 .area GSINIT0 (CODE) 402 .area GSINIT1 (CODE) 403 .area GSINIT2 (CODE) 404 .area GSINIT3 (CODE) 405 .area GSINIT4 (CODE) 406 .area GSINIT5 (CODE) 407 .area GSINIT (CODE) 408 .area GSFINAL (CODE) 409 .area CSEG (CODE) 410 ;-------------------------------------------------------- 411 ; interrupt vector 412 ;-------------------------------------------------------- 413 .area HOME (CODE) 0000 414 __interrupt_vect: 0000 02s00r00 415 ljmp __sdcc_gsinit_startup 0003 32 416 reti 0004 417 .ds 7 000B 02s00r84 418 ljmp _T1_ISR 000E 419 .ds 5 0013 02s00r87 420 ljmp _T0_ISR 421 ;-------------------------------------------------------- 422 ; global & static initialisations 423 ;-------------------------------------------------------- 424 .area HOME (CODE) 425 .area GSINIT (CODE) 426 .area GSFINAL (CODE) 427 .area GSINIT (CODE) 428 .globl __sdcc_gsinit_startup 429 .globl __sdcc_program_startup 430 .globl __start__stack 431 .globl __mcs51_genXINIT 432 .globl __mcs51_genXRAMCLEAR 433 .globl __mcs51_genRAMCLEAR 434 ; SRC/new.c:36: int i = 0; //Счётчик для регулирования времени исполнения ноты 0000 E4 435 clr a 0001 F5*00 436 mov _i,a 0003 F5*01 437 mov (_i + 1),a 438 ; SRC/new.c:37: char t = 0; //Флаг для переключения регистра ENA 0005 75*02 00 439 mov _t,#0x00 440 ; SRC/new.c:38: unsigned char k = 0; //Счётчик внешних прерываний 0008 75*03 00 441 mov _k,#0x00 442 .area GSFINAL (CODE) 0000 02s00r16 443 ljmp __sdcc_program_startup 444 ;-------------------------------------------------------- 445 ; Home 446 ;-------------------------------------------------------- 447 .area HOME (CODE) 448 .area HOME (CODE) 0016 449 __sdcc_program_startup: 0016 12s04r5B 450 lcall _main 451 ; return from main will lock up 0019 80 FE 452 sjmp . 453 ;-------------------------------------------------------- 454 ; code 455 ;-------------------------------------------------------- 456 .area CSEG (CODE) 457 ;------------------------------------------------------------ 458 ;Allocation info for local variables in function 'delay' 459 ;------------------------------------------------------------ 460 ;ms Allocated to registers r4 r5 r6 r7 461 ;i Allocated to stack - _bp +1 462 ;j Allocated to stack - _bp +5 463 ;------------------------------------------------------------ 464 ; SRC/new.c:26: void delay ( unsigned long ms ) 465 ; ----------------------------------------- 466 ; function delay 467 ; ----------------------------------------- 0000 468 _delay: 0007 469 ar7 = 0x07 0006 470 ar6 = 0x06 0005 471 ar5 = 0x05 0004 472 ar4 = 0x04 0003 473 ar3 = 0x03 0002 474 ar2 = 0x02 0001 475 ar1 = 0x01 0000 476 ar0 = 0x00 0000 C0*00 477 push _bp 0002 85 81*00 478 mov _bp,sp 0005 AC 82 479 mov r4,dpl 0007 AD 83 480 mov r5,dph 0009 AE F0 481 mov r6,b 000B FF 482 mov r7,a 000C E5 81 483 mov a,sp 000E 24 08 484 add a,#0x08 0010 F5 81 485 mov sp,a 486 ; SRC/new.c:30: for( j = 0; j < ms; j++ ) 0012 E5*00 487 mov a,_bp 0014 24 05 488 add a,#0x05 0016 F8 489 mov r0,a 0017 E4 490 clr a 0018 F6 491 mov @r0,a 0019 08 492 inc r0 001A F6 493 mov @r0,a 001B 08 494 inc r0 001C F6 495 mov @r0,a 001D 08 496 inc r0 001E F6 497 mov @r0,a 001F 498 00105$: 001F E5*00 499 mov a,_bp 0021 24 05 500 add a,#0x05 0023 F8 501 mov r0,a 0024 C3 502 clr c 0025 E6 503 mov a,@r0 0026 9C 504 subb a,r4 0027 08 505 inc r0 0028 E6 506 mov a,@r0 0029 9D 507 subb a,r5 002A 08 508 inc r0 002B E6 509 mov a,@r0 002C 9E 510 subb a,r6 002D 08 511 inc r0 002E E6 512 mov a,@r0 002F 9F 513 subb a,r7 0030 50 4C 514 jnc 00109$ 515 ; SRC/new.c:32: for( i = 0; i < 50; i++ ); 0032 A8*00 516 mov r0,_bp 0034 08 517 inc r0 0035 E4 518 clr a 0036 F6 519 mov @r0,a 0037 08 520 inc r0 0038 F6 521 mov @r0,a 0039 08 522 inc r0 003A F6 523 mov @r0,a 003B 08 524 inc r0 003C F6 525 mov @r0,a 003D 526 00101$: 003D A8*00 527 mov r0,_bp 003F 08 528 inc r0 0040 C3 529 clr c 0041 E6 530 mov a,@r0 0042 94 32 531 subb a,#0x32 0044 08 532 inc r0 0045 E6 533 mov a,@r0 0046 94 00 534 subb a,#0x00 0048 08 535 inc r0 0049 E6 536 mov a,@r0 004A 94 00 537 subb a,#0x00 004C 08 538 inc r0 004D E6 539 mov a,@r0 004E 94 00 540 subb a,#0x00 0050 50 15 541 jnc 00107$ 0052 A8*00 542 mov r0,_bp 0054 08 543 inc r0 0055 74 01 544 mov a,#0x01 0057 26 545 add a,@r0 0058 F6 546 mov @r0,a 0059 E4 547 clr a 005A 08 548 inc r0 005B 36 549 addc a,@r0 005C F6 550 mov @r0,a 005D E4 551 clr a 005E 08 552 inc r0 005F 36 553 addc a,@r0 0060 F6 554 mov @r0,a 0061 E4 555 clr a 0062 08 556 inc r0 0063 36 557 addc a,@r0 0064 F6 558 mov @r0,a 0065 80 D6 559 sjmp 00101$ 0067 560 00107$: 561 ; SRC/new.c:30: for( j = 0; j < ms; j++ ) 0067 E5*00 562 mov a,_bp 0069 24 05 563 add a,#0x05 006B F8 564 mov r0,a 006C 74 01 565 mov a,#0x01 006E 26 566 add a,@r0 006F F6 567 mov @r0,a 0070 E4 568 clr a 0071 08 569 inc r0 0072 36 570 addc a,@r0 0073 F6 571 mov @r0,a 0074 E4 572 clr a 0075 08 573 inc r0 0076 36 574 addc a,@r0 0077 F6 575 mov @r0,a 0078 E4 576 clr a 0079 08 577 inc r0 007A 36 578 addc a,@r0 007B F6 579 mov @r0,a 007C 80 A1 580 sjmp 00105$ 007E 581 00109$: 007E 85*00 81 582 mov sp,_bp 0081 D0*00 583 pop _bp 0083 22 584 ret 585 ;------------------------------------------------------------ 586 ;Allocation info for local variables in function 'T1_ISR' 587 ;------------------------------------------------------------ 588 ; SRC/new.c:49: void T1_ISR( void ) __interrupt ( 1 ) 589 ; ----------------------------------------- 590 ; function T1_ISR 591 ; ----------------------------------------- 0084 592 _T1_ISR: 593 ; SRC/new.c:51: k++; 0084 05*03 594 inc _k 0086 32 595 reti 596 ; eliminated unneeded mov psw,# (no regs used in bank) 597 ; eliminated unneeded push/pop psw 598 ; eliminated unneeded push/pop dpl 599 ; eliminated unneeded push/pop dph 600 ; eliminated unneeded push/pop b 601 ; eliminated unneeded push/pop acc 602 ;------------------------------------------------------------ 603 ;Allocation info for local variables in function 'T0_ISR' 604 ;------------------------------------------------------------ 605 ; SRC/new.c:65: void T0_ISR( void ) __interrupt ( 2 ) 606 ; ----------------------------------------- 607 ; function T0_ISR 608 ; ----------------------------------------- 0087 609 _T0_ISR: 0087 C0*00 610 push bits 0089 C0 E0 611 push acc 008B C0 F0 612 push b 008D C0 82 613 push dpl 008F C0 83 614 push dph 0091 C0 07 615 push (0+7) 0093 C0 06 616 push (0+6) 0095 C0 05 617 push (0+5) 0097 C0 04 618 push (0+4) 0099 C0 03 619 push (0+3) 009B C0 02 620 push (0+2) 009D C0 01 621 push (0+1) 009F C0 00 622 push (0+0) 00A1 C0 D0 623 push psw 00A3 75 D0 00 624 mov psw,#0x00 625 ; SRC/new.c:67: if( i <= 500 && t == 0 ) 00A6 C3 626 clr c 00A7 74 F4 627 mov a,#0xF4 00A9 95*00 628 subb a,_i 00AB 74 81 629 mov a,#(0x01 ^ 0x80) 00AD 85*01 F0 630 mov b,(_i + 1) 00B0 63 F0 80 631 xrl b,#0x80 00B3 95 F0 632 subb a,b 00B5 E4 633 clr a 00B6 33 634 rlc a 00B7 FF 635 mov r7,a 00B8 70 24 636 jnz 00166$ 00BA E5*02 637 mov a,_t 00BC 70 20 638 jnz 00166$ 639 ; SRC/new.c:70: write_max(ENA, 0b0100000); 00BE 74 20 640 mov a,#0x20 00C0 C0 E0 641 push acc 00C2 90 00 04 642 mov dptr,#0x0004 00C5 12s00r00 643 lcall _write_max 00C8 15 81 644 dec sp 645 ; SRC/new.c:71: t = 1; 00CA 75*02 01 646 mov _t,#0x01 647 ; SRC/new.c:72: i++; 00CD 05*00 648 inc _i 00CF E4 649 clr a 00D0 B5*00 02 650 cjne a,_i,00253$ 00D3 05*01 651 inc (_i + 1) 00D5 652 00253$: 653 ; SRC/new.c:73: TH0 = 0xFC; 00D5 75 8C FC 654 mov _TH0,#0xFC 655 ; SRC/new.c:74: TL0 = 0x17; 00D8 75 8A 17 656 mov _TL0,#0x17 00DB 02s04r06 657 ljmp 00169$ 00DE 658 00166$: 659 ; SRC/new.c:76: else if ( i <= 500 && t == 1 ) 00DE EF 660 mov a,r7 00DF 70 25 661 jnz 00162$ 00E1 74 01 662 mov a,#0x01 00E3 B5*02 20 663 cjne a,_t,00162$ 664 ; SRC/new.c:79: write_max(ENA, 0b0111100); 00E6 74 3C 665 mov a,#0x3C 00E8 C0 E0 666 push acc 00EA 90 00 04 667 mov dptr,#0x0004 00ED 12s00r00 668 lcall _write_max 00F0 15 81 669 dec sp 670 ; SRC/new.c:80: t=0; 00F2 75*02 00 671 mov _t,#0x00 672 ; SRC/new.c:81: i++; 00F5 05*00 673 inc _i 00F7 E4 674 clr a 00F8 B5*00 02 675 cjne a,_i,00257$ 00FB 05*01 676 inc (_i + 1) 00FD 677 00257$: 678 ; SRC/new.c:82: TH0 = 0xFC; 00FD 75 8C FC 679 mov _TH0,#0xFC 680 ; SRC/new.c:83: TL0 = 0x17; 0100 75 8A 17 681 mov _TL0,#0x17 0103 02s04r06 682 ljmp 00169$ 0106 683 00162$: 684 ; SRC/new.c:85: else if( i > 500 && i <= 948 && t==0 ) 0106 EF 685 mov a,r7 0107 60 35 686 jz 00157$ 0109 C3 687 clr c 010A 74 B4 688 mov a,#0xB4 010C 95*00 689 subb a,_i 010E 74 83 690 mov a,#(0x03 ^ 0x80) 0110 85*01 F0 691 mov b,(_i + 1) 0113 63 F0 80 692 xrl b,#0x80 0116 95 F0 693 subb a,b 0118 40 24 694 jc 00157$ 011A E5*02 695 mov a,_t 011C 70 20 696 jnz 00157$ 697 ; SRC/new.c:88: write_max(ENA, 0b0100000); 011E 74 20 698 mov a,#0x20 0120 C0 E0 699 push acc 0122 90 00 04 700 mov dptr,#0x0004 0125 12s00r00 701 lcall _write_max 0128 15 81 702 dec sp 703 ; SRC/new.c:89: t = 1; 012A 75*02 01 704 mov _t,#0x01 705 ; SRC/new.c:90: i++; 012D 05*00 706 inc _i 012F E4 707 clr a 0130 B5*00 02 708 cjne a,_i,00261$ 0133 05*01 709 inc (_i + 1) 0135 710 00261$: 711 ; SRC/new.c:91: TH0 = 0xFB; 0135 75 8C FB 712 mov _TH0,#0xFB 713 ; SRC/new.c:92: TL0 = 0x8B; 0138 75 8A 8B 714 mov _TL0,#0x8B 013B 02s04r06 715 ljmp 00169$ 013E 716 00157$: 717 ; SRC/new.c:94: else if( i > 500 && i <= 948 && t == 1 ) 013E EF 718 mov a,r7 013F 60 36 719 jz 00152$ 0141 C3 720 clr c 0142 74 B4 721 mov a,#0xB4 0144 95*00 722 subb a,_i 0146 74 83 723 mov a,#(0x03 ^ 0x80) 0148 85*01 F0 724 mov b,(_i + 1) 014B 63 F0 80 725 xrl b,#0x80 014E 95 F0 726 subb a,b 0150 40 25 727 jc 00152$ 0152 74 01 728 mov a,#0x01 0154 B5*02 20 729 cjne a,_t,00152$ 730 ; SRC/new.c:97: write_max(ENA, 0b0111100); 0157 74 3C 731 mov a,#0x3C 0159 C0 E0 732 push acc 015B 90 00 04 733 mov dptr,#0x0004 015E 12s00r00 734 lcall _write_max 0161 15 81 735 dec sp 736 ; SRC/new.c:98: t = 0; 0163 75*02 00 737 mov _t,#0x00 738 ; SRC/new.c:99: i++; 0166 05*00 739 inc _i 0168 E4 740 clr a 0169 B5*00 02 741 cjne a,_i,00266$ 016C 05*01 742 inc (_i + 1) 016E 743 00266$: 744 ; SRC/new.c:100: TH0 = 0xFB; 016E 75 8C FB 745 mov _TH0,#0xFB 746 ; SRC/new.c:101: TL0 = 0x8B; 0171 75 8A 8B 747 mov _TL0,#0x8B 0174 02s04r06 748 ljmp 00169$ 0177 749 00152$: 750 ; SRC/new.c:103: else if( i > 948 && i <= 1338 && t == 0 ) 0177 C3 751 clr c 0178 74 B4 752 mov a,#0xB4 017A 95*00 753 subb a,_i 017C 74 83 754 mov a,#(0x03 ^ 0x80) 017E 85*01 F0 755 mov b,(_i + 1) 0181 63 F0 80 756 xrl b,#0x80 0184 95 F0 757 subb a,b 0186 E4 758 clr a 0187 33 759 rlc a 0188 FF 760 mov r7,a 0189 60 35 761 jz 00147$ 018B C3 762 clr c 018C 74 3A 763 mov a,#0x3A 018E 95*00 764 subb a,_i 0190 74 85 765 mov a,#(0x05 ^ 0x80) 0192 85*01 F0 766 mov b,(_i + 1) 0195 63 F0 80 767 xrl b,#0x80 0198 95 F0 768 subb a,b 019A 40 24 769 jc 00147$ 019C E5*02 770 mov a,_t 019E 70 20 771 jnz 00147$ 772 ; SRC/new.c:106: write_max(ENA, 0b0100000); 01A0 74 20 773 mov a,#0x20 01A2 C0 E0 774 push acc 01A4 90 00 04 775 mov dptr,#0x0004 01A7 12s00r00 776 lcall _write_max 01AA 15 81 777 dec sp 778 ; SRC/new.c:107: t = 1; 01AC 75*02 01 779 mov _t,#0x01 780 ; SRC/new.c:108: i++; 01AF 05*00 781 inc _i 01B1 E4 782 clr a 01B2 B5*00 02 783 cjne a,_i,00270$ 01B5 05*01 784 inc (_i + 1) 01B7 785 00270$: 786 ; SRC/new.c:109: TH0 = 0xFA; 01B7 75 8C FA 787 mov _TH0,#0xFA 788 ; SRC/new.c:110: TL0 = 0xFF; 01BA 75 8A FF 789 mov _TL0,#0xFF 01BD 02s04r06 790 ljmp 00169$ 01C0 791 00147$: 792 ; SRC/new.c:112: else if( i > 948 && i <= 1338 && t== 1 ) 01C0 EF 793 mov a,r7 01C1 60 36 794 jz 00142$ 01C3 C3 795 clr c 01C4 74 3A 796 mov a,#0x3A 01C6 95*00 797 subb a,_i 01C8 74 85 798 mov a,#(0x05 ^ 0x80) 01CA 85*01 F0 799 mov b,(_i + 1) 01CD 63 F0 80 800 xrl b,#0x80 01D0 95 F0 801 subb a,b 01D2 40 25 802 jc 00142$ 01D4 74 01 803 mov a,#0x01 01D6 B5*02 20 804 cjne a,_t,00142$ 805 ; SRC/new.c:115: write_max(ENA, 0b0111100); 01D9 74 3C 806 mov a,#0x3C 01DB C0 E0 807 push acc 01DD 90 00 04 808 mov dptr,#0x0004 01E0 12s00r00 809 lcall _write_max 01E3 15 81 810 dec sp 811 ; SRC/new.c:116: t = 0; 01E5 75*02 00 812 mov _t,#0x00 813 ; SRC/new.c:117: i++; 01E8 05*00 814 inc _i 01EA E4 815 clr a 01EB B5*00 02 816 cjne a,_i,00275$ 01EE 05*01 817 inc (_i + 1) 01F0 818 00275$: 819 ; SRC/new.c:118: TH0 = 0xFA; 01F0 75 8C FA 820 mov _TH0,#0xFA 821 ; SRC/new.c:119: TL0 = 0xFF; 01F3 75 8A FF 822 mov _TL0,#0xFF 01F6 02s04r06 823 ljmp 00169$ 01F9 824 00142$: 825 ; SRC/new.c:121: else if( i > 1338 && i <= 1687 && t==0 ) 01F9 C3 826 clr c 01FA 74 3A 827 mov a,#0x3A 01FC 95*00 828 subb a,_i 01FE 74 85 829 mov a,#(0x05 ^ 0x80) 0200 85*01 F0 830 mov b,(_i + 1) 0203 63 F0 80 831 xrl b,#0x80 0206 95 F0 832 subb a,b 0208 E4 833 clr a 0209 33 834 rlc a 020A FF 835 mov r7,a 020B 60 35 836 jz 00137$ 020D C3 837 clr c 020E 74 97 838 mov a,#0x97 0210 95*00 839 subb a,_i 0212 74 86 840 mov a,#(0x06 ^ 0x80) 0214 85*01 F0 841 mov b,(_i + 1) 0217 63 F0 80 842 xrl b,#0x80 021A 95 F0 843 subb a,b 021C 40 24 844 jc 00137$ 021E E5*02 845 mov a,_t 0220 70 20 846 jnz 00137$ 847 ; SRC/new.c:124: write_max(ENA, 0b0100000); 0222 74 20 848 mov a,#0x20 0224 C0 E0 849 push acc 0226 90 00 04 850 mov dptr,#0x0004 0229 12s00r00 851 lcall _write_max 022C 15 81 852 dec sp 853 ; SRC/new.c:125: t = 1; 022E 75*02 01 854 mov _t,#0x01 855 ; SRC/new.c:126: i++; 0231 05*00 856 inc _i 0233 E4 857 clr a 0234 B5*00 02 858 cjne a,_i,00279$ 0237 05*01 859 inc (_i + 1) 0239 860 00279$: 861 ; SRC/new.c:127: TH0 = 0xFA; 0239 75 8C FA 862 mov _TH0,#0xFA 863 ; SRC/new.c:128: TL0 = 0x69; 023C 75 8A 69 864 mov _TL0,#0x69 023F 02s04r06 865 ljmp 00169$ 0242 866 00137$: 867 ; SRC/new.c:130: else if( i > 1338 && i <= 1687 && t==1 ) 0242 EF 868 mov a,r7 0243 60 36 869 jz 00132$ 0245 C3 870 clr c 0246 74 97 871 mov a,#0x97 0248 95*00 872 subb a,_i 024A 74 86 873 mov a,#(0x06 ^ 0x80) 024C 85*01 F0 874 mov b,(_i + 1) 024F 63 F0 80 875 xrl b,#0x80 0252 95 F0 876 subb a,b 0254 40 25 877 jc 00132$ 0256 74 01 878 mov a,#0x01 0258 B5*02 20 879 cjne a,_t,00132$ 880 ; SRC/new.c:133: write_max(ENA, 0b0111100); 025B 74 3C 881 mov a,#0x3C 025D C0 E0 882 push acc 025F 90 00 04 883 mov dptr,#0x0004 0262 12s00r00 884 lcall _write_max 0265 15 81 885 dec sp 886 ; SRC/new.c:134: t = 0; 0267 75*02 00 887 mov _t,#0x00 888 ; SRC/new.c:135: i++; 026A 05*00 889 inc _i 026C E4 890 clr a 026D B5*00 02 891 cjne a,_i,00284$ 0270 05*01 892 inc (_i + 1) 0272 893 00284$: 894 ; SRC/new.c:136: TH0 = 0xFA; 0272 75 8C FA 895 mov _TH0,#0xFA 896 ; SRC/new.c:137: TL0 = 0x69; 0275 75 8A 69 897 mov _TL0,#0x69 0278 02s04r06 898 ljmp 00169$ 027B 899 00132$: 900 ; SRC/new.c:139: else if( i > 1687 && i <= 2016 && t==0 ) 027B C3 901 clr c 027C 74 97 902 mov a,#0x97 027E 95*00 903 subb a,_i 0280 74 86 904 mov a,#(0x06 ^ 0x80) 0282 85*01 F0 905 mov b,(_i + 1) 0285 63 F0 80 906 xrl b,#0x80 0288 95 F0 907 subb a,b 028A E4 908 clr a 028B 33 909 rlc a 028C FF 910 mov r7,a 028D 60 35 911 jz 00127$ 028F C3 912 clr c 0290 74 E0 913 mov a,#0xE0 0292 95*00 914 subb a,_i 0294 74 87 915 mov a,#(0x07 ^ 0x80) 0296 85*01 F0 916 mov b,(_i + 1) 0299 63 F0 80 917 xrl b,#0x80 029C 95 F0 918 subb a,b 029E 40 24 919 jc 00127$ 02A0 E5*02 920 mov a,_t 02A2 70 20 921 jnz 00127$ 922 ; SRC/new.c:142: write_max(ENA, 0b0100000); 02A4 74 20 923 mov a,#0x20 02A6 C0 E0 924 push acc 02A8 90 00 04 925 mov dptr,#0x0004 02AB 12s00r00 926 lcall _write_max 02AE 15 81 927 dec sp 928 ; SRC/new.c:143: t = 1; 02B0 75*02 01 929 mov _t,#0x01 930 ; SRC/new.c:144: i++; 02B3 05*00 931 inc _i 02B5 E4 932 clr a 02B6 B5*00 02 933 cjne a,_i,00288$ 02B9 05*01 934 inc (_i + 1) 02BB 935 00288$: 936 ; SRC/new.c:145: TH0 = 0xFA; 02BB 75 8C FA 937 mov _TH0,#0xFA 938 ; SRC/new.c:146: TL0 = 0x0F; 02BE 75 8A 0F 939 mov _TL0,#0x0F 02C1 02s04r06 940 ljmp 00169$ 02C4 941 00127$: 942 ; SRC/new.c:148: else if( i > 1687 && i <= 2016 && t==1 ) 02C4 EF 943 mov a,r7 02C5 60 36 944 jz 00122$ 02C7 C3 945 clr c 02C8 74 E0 946 mov a,#0xE0 02CA 95*00 947 subb a,_i 02CC 74 87 948 mov a,#(0x07 ^ 0x80) 02CE 85*01 F0 949 mov b,(_i + 1) 02D1 63 F0 80 950 xrl b,#0x80 02D4 95 F0 951 subb a,b 02D6 40 25 952 jc 00122$ 02D8 74 01 953 mov a,#0x01 02DA B5*02 20 954 cjne a,_t,00122$ 955 ; SRC/new.c:151: write_max(ENA, 0b0111100); 02DD 74 3C 956 mov a,#0x3C 02DF C0 E0 957 push acc 02E1 90 00 04 958 mov dptr,#0x0004 02E4 12s00r00 959 lcall _write_max 02E7 15 81 960 dec sp 961 ; SRC/new.c:152: t = 0; 02E9 75*02 00 962 mov _t,#0x00 963 ; SRC/new.c:153: i++; 02EC 05*00 964 inc _i 02EE E4 965 clr a 02EF B5*00 02 966 cjne a,_i,00293$ 02F2 05*01 967 inc (_i + 1) 02F4 968 00293$: 969 ; SRC/new.c:154: TH0 = 0xFA; 02F4 75 8C FA 970 mov _TH0,#0xFA 971 ; SRC/new.c:155: TL0 = 0x0F; 02F7 75 8A 0F 972 mov _TL0,#0x0F 02FA 02s04r06 973 ljmp 00169$ 02FD 974 00122$: 975 ; SRC/new.c:157: else if( i > 2016 && i <= 2310 && t==0 ) 02FD C3 976 clr c 02FE 74 E0 977 mov a,#0xE0 0300 95*00 978 subb a,_i 0302 74 87 979 mov a,#(0x07 ^ 0x80) 0304 85*01 F0 980 mov b,(_i + 1) 0307 63 F0 80 981 xrl b,#0x80 030A 95 F0 982 subb a,b 030C E4 983 clr a 030D 33 984 rlc a 030E FF 985 mov r7,a 030F 60 35 986 jz 00117$ 0311 C3 987 clr c 0312 74 06 988 mov a,#0x06 0314 95*00 989 subb a,_i 0316 74 89 990 mov a,#(0x09 ^ 0x80) 0318 85*01 F0 991 mov b,(_i + 1) 031B 63 F0 80 992 xrl b,#0x80 031E 95 F0 993 subb a,b 0320 40 24 994 jc 00117$ 0322 E5*02 995 mov a,_t 0324 70 20 996 jnz 00117$ 997 ; SRC/new.c:160: write_max(ENA, 0b0100000); 0326 74 20 998 mov a,#0x20 0328 C0 E0 999 push acc 032A 90 00 04 1000 mov dptr,#0x0004 032D 12s00r00 1001 lcall _write_max 0330 15 81 1002 dec sp 1003 ; SRC/new.c:161: t = 1; 0332 75*02 01 1004 mov _t,#0x01 1005 ; SRC/new.c:162: i++; 0335 05*00 1006 inc _i 0337 E4 1007 clr a 0338 B5*00 02 1008 cjne a,_i,00297$ 033B 05*01 1009 inc (_i + 1) 033D 1010 00297$: 1011 ; SRC/new.c:163: TH0 = 0xF9; 033D 75 8C F9 1012 mov _TH0,#0xF9 1013 ; SRC/new.c:164: TL0 = 0x5B; 0340 75 8A 5B 1014 mov _TL0,#0x5B 0343 02s04r06 1015 ljmp 00169$ 0346 1016 00117$: 1017 ; SRC/new.c:166: else if( i > 2016 && i <= 2310 && t==1 ) 0346 EF 1018 mov a,r7 0347 60 36 1019 jz 00112$ 0349 C3 1020 clr c 034A 74 06 1021 mov a,#0x06 034C 95*00 1022 subb a,_i 034E 74 89 1023 mov a,#(0x09 ^ 0x80) 0350 85*01 F0 1024 mov b,(_i + 1) 0353 63 F0 80 1025 xrl b,#0x80 0356 95 F0 1026 subb a,b 0358 40 25 1027 jc 00112$ 035A 74 01 1028 mov a,#0x01 035C B5*02 20 1029 cjne a,_t,00112$ 1030 ; SRC/new.c:169: write_max(ENA, 0b0111100); 035F 74 3C 1031 mov a,#0x3C 0361 C0 E0 1032 push acc 0363 90 00 04 1033 mov dptr,#0x0004 0366 12s00r00 1034 lcall _write_max 0369 15 81 1035 dec sp 1036 ; SRC/new.c:170: t = 0; 036B 75*02 00 1037 mov _t,#0x00 1038 ; SRC/new.c:171: i++; 036E 05*00 1039 inc _i 0370 E4 1040 clr a 0371 B5*00 02 1041 cjne a,_i,00302$ 0374 05*01 1042 inc (_i + 1) 0376 1043 00302$: 1044 ; SRC/new.c:172: TH0 = 0xF9; 0376 75 8C F9 1045 mov _TH0,#0xF9 1046 ; SRC/new.c:173: TL0 = 0x5B; 0379 75 8A 5B 1047 mov _TL0,#0x5B 037C 02s04r06 1048 ljmp 00169$ 037F 1049 00112$: 1050 ; SRC/new.c:175: else if( i > 2310 && i <= 2571 && t==0 ) 037F C3 1051 clr c 0380 74 06 1052 mov a,#0x06 0382 95*00 1053 subb a,_i 0384 74 89 1054 mov a,#(0x09 ^ 0x80) 0386 85*01 F0 1055 mov b,(_i + 1) 0389 63 F0 80 1056 xrl b,#0x80 038C 95 F0 1057 subb a,b 038E E4 1058 clr a 038F 33 1059 rlc a 0390 FF 1060 mov r7,a 0391 60 34 1061 jz 00107$ 0393 C3 1062 clr c 0394 74 0B 1063 mov a,#0x0B 0396 95*00 1064 subb a,_i 0398 74 8A 1065 mov a,#(0x0A ^ 0x80) 039A 85*01 F0 1066 mov b,(_i + 1) 039D 63 F0 80 1067 xrl b,#0x80 03A0 95 F0 1068 subb a,b 03A2 40 23 1069 jc 00107$ 03A4 E5*02 1070 mov a,_t 03A6 70 1F 1071 jnz 00107$ 1072 ; SRC/new.c:178: write_max(ENA, 0b0100000); 03A8 74 20 1073 mov a,#0x20 03AA C0 E0 1074 push acc 03AC 90 00 04 1075 mov dptr,#0x0004 03AF 12s00r00 1076 lcall _write_max 03B2 15 81 1077 dec sp 1078 ; SRC/new.c:179: t = 1; 03B4 75*02 01 1079 mov _t,#0x01 1080 ; SRC/new.c:180: i++; 03B7 05*00 1081 inc _i 03B9 E4 1082 clr a 03BA B5*00 02 1083 cjne a,_i,00306$ 03BD 05*01 1084 inc (_i + 1) 03BF 1085 00306$: 1086 ; SRC/new.c:181: TH0 = 0xF8; 03BF 75 8C F8 1087 mov _TH0,#0xF8 1088 ; SRC/new.c:182: TL0 = 0x89; 03C2 75 8A 89 1089 mov _TL0,#0x89 03C5 80 3F 1090 sjmp 00169$ 03C7 1091 00107$: 1092 ; SRC/new.c:184: else if( i > 2310 && i <= 2571 && t==1 ) 03C7 EF 1093 mov a,r7 03C8 60 35 1094 jz 00102$ 03CA C3 1095 clr c 03CB 74 0B 1096 mov a,#0x0B 03CD 95*00 1097 subb a,_i 03CF 74 8A 1098 mov a,#(0x0A ^ 0x80) 03D1 85*01 F0 1099 mov b,(_i + 1) 03D4 63 F0 80 1100 xrl b,#0x80 03D7 95 F0 1101 subb a,b 03D9 40 24 1102 jc 00102$ 03DB 74 01 1103 mov a,#0x01 03DD B5*02 1F 1104 cjne a,_t,00102$ 1105 ; SRC/new.c:187: write_max(ENA, 0b0111100); 03E0 74 3C 1106 mov a,#0x3C 03E2 C0 E0 1107 push acc 03E4 90 00 04 1108 mov dptr,#0x0004 03E7 12s00r00 1109 lcall _write_max 03EA 15 81 1110 dec sp 1111 ; SRC/new.c:188: t = 0; 03EC 75*02 00 1112 mov _t,#0x00 1113 ; SRC/new.c:189: i++; 03EF 05*00 1114 inc _i 03F1 E4 1115 clr a 03F2 B5*00 02 1116 cjne a,_i,00311$ 03F5 05*01 1117 inc (_i + 1) 03F7 1118 00311$: 1119 ; SRC/new.c:190: TH0 = 0xF8; 03F7 75 8C F8 1120 mov _TH0,#0xF8 1121 ; SRC/new.c:191: TL0 = 0x89; 03FA 75 8A 89 1122 mov _TL0,#0x89 03FD 80 07 1123 sjmp 00169$ 03FF 1124 00102$: 1125 ; SRC/new.c:196: i = 0; 1126 ; SRC/new.c:197: t = 0; 03FF E4 1127 clr a 0400 F5*00 1128 mov _i,a 0402 F5*01 1129 mov (_i + 1),a 0404 F5*02 1130 mov _t,a 0406 1131 00169$: 0406 D0 D0 1132 pop psw 0408 D0 00 1133 pop (0+0) 040A D0 01 1134 pop (0+1) 040C D0 02 1135 pop (0+2) 040E D0 03 1136 pop (0+3) 0410 D0 04 1137 pop (0+4) 0412 D0 05 1138 pop (0+5) 0414 D0 06 1139 pop (0+6) 0416 D0 07 1140 pop (0+7) 0418 D0 83 1141 pop dph 041A D0 82 1142 pop dpl 041C D0 F0 1143 pop b 041E D0 E0 1144 pop acc 0420 D0*00 1145 pop bits 0422 32 1146 reti 1147 ;------------------------------------------------------------ 1148 ;Allocation info for local variables in function 'SetVector' 1149 ;------------------------------------------------------------ 1150 ;Vector Allocated to stack - _bp -5 1151 ;Address Allocated to registers r6 r7 1152 ;TmpVector Allocated to registers r6 r7 1153 ;------------------------------------------------------------ 1154 ; SRC/new.c:213: void SetVector(unsigned char __xdata * Address, void * Vector) 1155 ; ----------------------------------------- 1156 ; function SetVector 1157 ; ----------------------------------------- 0423 1158 _SetVector: 0423 C0*00 1159 push _bp 0425 85 81*00 1160 mov _bp,sp 1161 ; SRC/new.c:218: *Address = 0x02; 0428 AE 82 1162 mov r6,dpl 042A AF 83 1163 mov r7,dph 042C 74 02 1164 mov a,#0x02 042E F0 1165 movx @dptr,a 1166 ; SRC/new.c:221: TmpVector = (unsigned char __xdata *) (Address + 1); 042F 0E 1167 inc r6 0430 BE 00 01 1168 cjne r6,#0x00,00103$ 0433 0F 1169 inc r7 0434 1170 00103$: 1171 ; SRC/new.c:222: *TmpVector = (unsigned char) ((unsigned short)Vector >> 8); 0434 E5*00 1172 mov a,_bp 0436 24 FB 1173 add a,#0xfb 0438 F8 1174 mov r0,a 0439 86 04 1175 mov ar4,@r0 043B 08 1176 inc r0 043C 86 05 1177 mov ar5,@r0 043E 8D 04 1178 mov ar4,r5 0440 8E 82 1179 mov dpl,r6 0442 8F 83 1180 mov dph,r7 0444 EC 1181 mov a,r4 0445 F0 1182 movx @dptr,a 0446 A3 1183 inc dptr 0447 AE 82 1184 mov r6,dpl 0449 AF 83 1185 mov r7,dph 1186 ; SRC/new.c:223: ++TmpVector; 1187 ; SRC/new.c:224: *TmpVector = (unsigned char) Vector; 044B E5*00 1188 mov a,_bp 044D 24 FB 1189 add a,#0xfb 044F F8 1190 mov r0,a 0450 86 05 1191 mov ar5,@r0 0452 8E 82 1192 mov dpl,r6 0454 8F 83 1193 mov dph,r7 0456 ED 1194 mov a,r5 0457 F0 1195 movx @dptr,a 0458 D0*00 1196 pop _bp 045A 22 1197 ret 1198 ;------------------------------------------------------------ 1199 ;Allocation info for local variables in function 'main' 1200 ;------------------------------------------------------------ 1201 ; SRC/new.c:231: void main( void ) 1202 ; ----------------------------------------- 1203 ; function main 1204 ; ----------------------------------------- 045B 1205 _main: 1206 ; SRC/new.c:234: TH0 = 0xFC; 045B 75 8C FC 1207 mov _TH0,#0xFC 1208 ; SRC/new.c:235: TL0 = 0x17; 045E 75 8A 17 1209 mov _TL0,#0x17 1210 ; SRC/new.c:236: TMOD = 0x01; 0461 75 89 01 1211 mov _TMOD,#0x01 1212 ; SRC/new.c:237: TCON = 0x11; 0464 75 88 11 1213 mov _TCON,#0x11 1214 ; SRC/new.c:240: SetVector( 0x200B, (void *)T0_ISR ); 0467 7Dr87 1215 mov r5,#_T0_ISR 0469 7Es00 1216 mov r6,#(_T0_ISR >> 8) 046B 7F 80 1217 mov r7,#0x80 046D C0 05 1218 push ar5 046F C0 06 1219 push ar6 0471 C0 07 1220 push ar7 0473 90 20 0B 1221 mov dptr,#0x200B 0476 12s04r23 1222 lcall _SetVector 0479 15 81 1223 dec sp 047B 15 81 1224 dec sp 047D 15 81 1225 dec sp 1226 ; SRC/new.c:241: SetVector( 0x2003, (void *)T1_ISR ); 047F 7Dr84 1227 mov r5,#_T1_ISR 0481 7Es00 1228 mov r6,#(_T1_ISR >> 8) 0483 7F 80 1229 mov r7,#0x80 0485 C0 05 1230 push ar5 0487 C0 06 1231 push ar6 0489 C0 07 1232 push ar7 048B 90 20 03 1233 mov dptr,#0x2003 048E 12s04r23 1234 lcall _SetVector 0491 15 81 1235 dec sp 0493 15 81 1236 dec sp 0495 15 81 1237 dec sp 1238 ; SRC/new.c:244: EA = 1; 0497 D2 AF 1239 setb _EA 1240 ; SRC/new.c:245: ET0 = 1; 0499 D2 A9 1241 setb _ET0 1242 ; SRC/new.c:246: EX0 = 1; 049B D2 A8 1243 setb _EX0 1244 ; SRC/new.c:248: while( 1 ) 049D 1245 00102$: 1246 ; SRC/new.c:250: leds( k ); 049D 85*03 82 1247 mov dpl,_k 04A0 12s00r00 1248 lcall _leds 04A3 80 F8 1249 sjmp 00102$ 1250 .area CSEG (CODE) 1251 .area CONST (CODE) 1252 .area XINIT (CODE) 1253 .area CABS (ABS,CODE)