1 ;-------------------------------------------------------- 2 ; File Created by SDCC : free open source ANSI-C Compiler 3 ; Version 3.2.0 #8008 (Jul 6 2012) (MINGW32) 4 ; This file was generated Fri Oct 02 12:47:04 2015 5 ;-------------------------------------------------------- 6 .module test_sio 7 .optsdcc -mmcs51 --model-small 8 9 ;-------------------------------------------------------- 10 ; Public variables in this module 11 ;-------------------------------------------------------- 12 .globl _main 13 .globl _SetVector 14 .globl _SIO_ISR 15 .globl _mistake 16 .globl _moderes 17 .globl _readdip 18 .globl _leds 19 .globl _init_sio 20 .globl _type 21 .globl _rsio 22 .globl _wsio 23 .globl _rsiostat 24 .globl _SPR0 25 .globl _SPR1 26 .globl _CPHA 27 .globl _CPOL 28 .globl _SPIM 29 .globl _SPE 30 .globl _WCOL 31 .globl _ISPI 32 .globl _I2CI 33 .globl _I2CTX 34 .globl _I2CRS 35 .globl _I2CM 36 .globl _MDI 37 .globl _MCO 38 .globl _MDE 39 .globl _MDO 40 .globl _CS0 41 .globl _CS1 42 .globl _CS2 43 .globl _CS3 44 .globl _SCONV 45 .globl _CCONV 46 .globl _DMA 47 .globl _ADCI 48 .globl _P 49 .globl _F1 50 .globl _OV 51 .globl _RS0 52 .globl _RS1 53 .globl _F0 54 .globl _AC 55 .globl _CY 56 .globl _CAP2 57 .globl _CNT2 58 .globl _TR2 59 .globl _XEN 60 .globl _TCLK 61 .globl _RCLK 62 .globl _EXF2 63 .globl _TF2 64 .globl _WDE 65 .globl _WDS 66 .globl _WDR2 67 .globl _WDR1 68 .globl _PRE0 69 .globl _PRE1 70 .globl _PRE2 71 .globl _PX0 72 .globl _PT0 73 .globl _PX1 74 .globl _PT1 75 .globl _PS 76 .globl _PT2 77 .globl _PADC 78 .globl _PSI 79 .globl _RXD 80 .globl _TXD 81 .globl _INT0 82 .globl _INT1 83 .globl _T0 84 .globl _T1 85 .globl _WR 86 .globl _RD 87 .globl _EX0 88 .globl _ET0 89 .globl _EX1 90 .globl _ET1 91 .globl _ES 92 .globl _ET2 93 .globl _EADC 94 .globl _EA 95 .globl _RI 96 .globl _TI 97 .globl _RB8 98 .globl _TB8 99 .globl _REN 100 .globl _SM2 101 .globl _SM1 102 .globl _SM0 103 .globl _T2 104 .globl _T2EX 105 .globl _IT0 106 .globl _IE0 107 .globl _IT1 108 .globl _IE1 109 .globl _TR0 110 .globl _TF0 111 .globl _TR1 112 .globl _TF1 113 .globl _DACCON 114 .globl _DAC1H 115 .globl _DAC1L 116 .globl _DAC0H 117 .globl _DAC0L 118 .globl _SPICON 119 .globl _SPIDAT 120 .globl _ADCCON3 121 .globl _ADCGAINH 122 .globl _ADCGAINL 123 .globl _ADCOFSH 124 .globl _ADCOFSL 125 .globl _B 126 .globl _ADCCON1 127 .globl _I2CCON 128 .globl _ACC 129 .globl _PSMCON 130 .globl _ADCDATAH 131 .globl _ADCDATAL 132 .globl _ADCCON2 133 .globl _DMAP 134 .globl _DMAH 135 .globl _DMAL 136 .globl _PSW 137 .globl _TH2 138 .globl _TL2 139 .globl _RCAP2H 140 .globl _RCAP2L 141 .globl _T2CON 142 .globl _EADRL 143 .globl _WDCON 144 .globl _EDATA4 145 .globl _EDATA3 146 .globl _EDATA2 147 .globl _EDATA1 148 .globl _ETIM3 149 .globl _ETIM2 150 .globl _ETIM1 151 .globl _ECON 152 .globl _IP 153 .globl _P3 154 .globl _IE2 155 .globl _IE 156 .globl _P2 157 .globl _I2CADD 158 .globl _I2CDAT 159 .globl _SBUF 160 .globl _SCON 161 .globl _P1 162 .globl _TH1 163 .globl _TH0 164 .globl _TL1 165 .globl _TL0 166 .globl _TMOD 167 .globl _TCON 168 .globl _PCON 169 .globl _DPP 170 .globl _DPH 171 .globl _DPL 172 .globl _SP 173 .globl _P0 174 .globl _d2 175 .globl _d1 176 .globl _result 177 .globl _mode 178 ;-------------------------------------------------------- 179 ; special function registers 180 ;-------------------------------------------------------- 181 .area RSEG (ABS,DATA) 0000 182 .org 0x0000 0080 183 _P0 = 0x0080 0081 184 _SP = 0x0081 0082 185 _DPL = 0x0082 0083 186 _DPH = 0x0083 0084 187 _DPP = 0x0084 0087 188 _PCON = 0x0087 0088 189 _TCON = 0x0088 0089 190 _TMOD = 0x0089 008A 191 _TL0 = 0x008a 008B 192 _TL1 = 0x008b 008C 193 _TH0 = 0x008c 008D 194 _TH1 = 0x008d 0090 195 _P1 = 0x0090 0098 196 _SCON = 0x0098 0099 197 _SBUF = 0x0099 009A 198 _I2CDAT = 0x009a 009B 199 _I2CADD = 0x009b 00A0 200 _P2 = 0x00a0 00A8 201 _IE = 0x00a8 00A9 202 _IE2 = 0x00a9 00B0 203 _P3 = 0x00b0 00B8 204 _IP = 0x00b8 00B9 205 _ECON = 0x00b9 00BA 206 _ETIM1 = 0x00ba 00BB 207 _ETIM2 = 0x00bb 00C4 208 _ETIM3 = 0x00c4 00BC 209 _EDATA1 = 0x00bc 00BD 210 _EDATA2 = 0x00bd 00BE 211 _EDATA3 = 0x00be 00BF 212 _EDATA4 = 0x00bf 00C0 213 _WDCON = 0x00c0 00C6 214 _EADRL = 0x00c6 00C8 215 _T2CON = 0x00c8 00CA 216 _RCAP2L = 0x00ca 00CB 217 _RCAP2H = 0x00cb 00CC 218 _TL2 = 0x00cc 00CD 219 _TH2 = 0x00cd 00D0 220 _PSW = 0x00d0 00D2 221 _DMAL = 0x00d2 00D3 222 _DMAH = 0x00d3 00D4 223 _DMAP = 0x00d4 00D8 224 _ADCCON2 = 0x00d8 00D9 225 _ADCDATAL = 0x00d9 00DA 226 _ADCDATAH = 0x00da 00DF 227 _PSMCON = 0x00df 00E0 228 _ACC = 0x00e0 00E8 229 _I2CCON = 0x00e8 00EF 230 _ADCCON1 = 0x00ef 00F0 231 _B = 0x00f0 00F1 232 _ADCOFSL = 0x00f1 00F2 233 _ADCOFSH = 0x00f2 00F3 234 _ADCGAINL = 0x00f3 00F4 235 _ADCGAINH = 0x00f4 00F5 236 _ADCCON3 = 0x00f5 00F7 237 _SPIDAT = 0x00f7 00F8 238 _SPICON = 0x00f8 00F9 239 _DAC0L = 0x00f9 00FA 240 _DAC0H = 0x00fa 00FB 241 _DAC1L = 0x00fb 00FC 242 _DAC1H = 0x00fc 00FD 243 _DACCON = 0x00fd 244 ;-------------------------------------------------------- 245 ; special function bits 246 ;-------------------------------------------------------- 247 .area RSEG (ABS,DATA) 0000 248 .org 0x0000 008F 249 _TF1 = 0x008f 008E 250 _TR1 = 0x008e 008D 251 _TF0 = 0x008d 008C 252 _TR0 = 0x008c 008B 253 _IE1 = 0x008b 008A 254 _IT1 = 0x008a 0089 255 _IE0 = 0x0089 0088 256 _IT0 = 0x0088 0091 257 _T2EX = 0x0091 0090 258 _T2 = 0x0090 009F 259 _SM0 = 0x009f 009E 260 _SM1 = 0x009e 009D 261 _SM2 = 0x009d 009C 262 _REN = 0x009c 009B 263 _TB8 = 0x009b 009A 264 _RB8 = 0x009a 0099 265 _TI = 0x0099 0098 266 _RI = 0x0098 00AF 267 _EA = 0x00af 00AE 268 _EADC = 0x00ae 00AD 269 _ET2 = 0x00ad 00AC 270 _ES = 0x00ac 00AB 271 _ET1 = 0x00ab 00AA 272 _EX1 = 0x00aa 00A9 273 _ET0 = 0x00a9 00A8 274 _EX0 = 0x00a8 00B7 275 _RD = 0x00b7 00B6 276 _WR = 0x00b6 00B5 277 _T1 = 0x00b5 00B4 278 _T0 = 0x00b4 00B3 279 _INT1 = 0x00b3 00B2 280 _INT0 = 0x00b2 00B1 281 _TXD = 0x00b1 00B0 282 _RXD = 0x00b0 00BF 283 _PSI = 0x00bf 00BE 284 _PADC = 0x00be 00BD 285 _PT2 = 0x00bd 00BC 286 _PS = 0x00bc 00BB 287 _PT1 = 0x00bb 00BA 288 _PX1 = 0x00ba 00B9 289 _PT0 = 0x00b9 00B8 290 _PX0 = 0x00b8 00C7 291 _PRE2 = 0x00c7 00C6 292 _PRE1 = 0x00c6 00C5 293 _PRE0 = 0x00c5 00C3 294 _WDR1 = 0x00c3 00C2 295 _WDR2 = 0x00c2 00C1 296 _WDS = 0x00c1 00C0 297 _WDE = 0x00c0 00CF 298 _TF2 = 0x00cf 00CE 299 _EXF2 = 0x00ce 00CD 300 _RCLK = 0x00cd 00CC 301 _TCLK = 0x00cc 00CB 302 _XEN = 0x00cb 00CA 303 _TR2 = 0x00ca 00C9 304 _CNT2 = 0x00c9 00C8 305 _CAP2 = 0x00c8 00D7 306 _CY = 0x00d7 00D6 307 _AC = 0x00d6 00D5 308 _F0 = 0x00d5 00D4 309 _RS1 = 0x00d4 00D3 310 _RS0 = 0x00d3 00D2 311 _OV = 0x00d2 00D1 312 _F1 = 0x00d1 00D0 313 _P = 0x00d0 00DF 314 _ADCI = 0x00df 00DE 315 _DMA = 0x00de 00DD 316 _CCONV = 0x00dd 00DC 317 _SCONV = 0x00dc 00DB 318 _CS3 = 0x00db 00DA 319 _CS2 = 0x00da 00D9 320 _CS1 = 0x00d9 00D8 321 _CS0 = 0x00d8 00EF 322 _MDO = 0x00ef 00EE 323 _MDE = 0x00ee 00ED 324 _MCO = 0x00ed 00EC 325 _MDI = 0x00ec 00EB 326 _I2CM = 0x00eb 00EA 327 _I2CRS = 0x00ea 00E9 328 _I2CTX = 0x00e9 00E8 329 _I2CI = 0x00e8 00FF 330 _ISPI = 0x00ff 00FE 331 _WCOL = 0x00fe 00FD 332 _SPE = 0x00fd 00FC 333 _SPIM = 0x00fc 00FB 334 _CPOL = 0x00fb 00FA 335 _CPHA = 0x00fa 00F9 336 _SPR1 = 0x00f9 00F8 337 _SPR0 = 0x00f8 338 ;-------------------------------------------------------- 339 ; overlayable register banks 340 ;-------------------------------------------------------- 341 .area REG_BANK_0 (REL,OVR,DATA) 0000 342 .ds 8 343 ;-------------------------------------------------------- 344 ; overlayable bit register bank 345 ;-------------------------------------------------------- 346 .area BIT_BANK (REL,OVR,DATA) 0000 347 bits: 0000 348 .ds 1 8000 349 b0 = bits[0] 8100 350 b1 = bits[1] 8200 351 b2 = bits[2] 8300 352 b3 = bits[3] 8400 353 b4 = bits[4] 8500 354 b5 = bits[5] 8600 355 b6 = bits[6] 8700 356 b7 = bits[7] 357 ;-------------------------------------------------------- 358 ; internal ram data 359 ;-------------------------------------------------------- 360 .area DSEG (DATA) 0000 361 _mode:: 0000 362 .ds 1 0001 363 _result:: 0001 364 .ds 1 0002 365 _d1:: 0002 366 .ds 1 0003 367 _d2:: 0003 368 .ds 1 369 ;-------------------------------------------------------- 370 ; overlayable items in internal ram 371 ;-------------------------------------------------------- 372 ;-------------------------------------------------------- 373 ; Stack segment in internal ram 374 ;-------------------------------------------------------- 375 .area SSEG (DATA) 0000 376 __start__stack: 0000 377 .ds 1 378 379 ;-------------------------------------------------------- 380 ; indirectly addressable internal ram data 381 ;-------------------------------------------------------- 382 .area ISEG (DATA) 383 ;-------------------------------------------------------- 384 ; absolute internal ram data 385 ;-------------------------------------------------------- 386 .area IABS (ABS,DATA) 387 .area IABS (ABS,DATA) 388 ;-------------------------------------------------------- 389 ; bit data 390 ;-------------------------------------------------------- 391 .area BSEG (BIT) 392 ;-------------------------------------------------------- 393 ; paged external ram data 394 ;-------------------------------------------------------- 395 .area PSEG (PAG,XDATA) 396 ;-------------------------------------------------------- 397 ; external ram data 398 ;-------------------------------------------------------- 399 .area XSEG (XDATA) 400 ;-------------------------------------------------------- 401 ; absolute external ram data 402 ;-------------------------------------------------------- 403 .area XABS (ABS,XDATA) 404 ;-------------------------------------------------------- 405 ; external initialized ram data 406 ;-------------------------------------------------------- 407 .area XISEG (XDATA) 408 .area HOME (CODE) 409 .area GSINIT0 (CODE) 410 .area GSINIT1 (CODE) 411 .area GSINIT2 (CODE) 412 .area GSINIT3 (CODE) 413 .area GSINIT4 (CODE) 414 .area GSINIT5 (CODE) 415 .area GSINIT (CODE) 416 .area GSFINAL (CODE) 417 .area CSEG (CODE) 418 ;-------------------------------------------------------- 419 ; interrupt vector 420 ;-------------------------------------------------------- 421 .area HOME (CODE) 0000 422 __interrupt_vect: 0000 02s00r00 423 ljmp __sdcc_gsinit_startup 0003 32 424 reti 0004 425 .ds 7 000B 32 426 reti 000C 427 .ds 7 0013 32 428 reti 0014 429 .ds 7 001B 32 430 reti 001C 431 .ds 7 0023 02s00r28 432 ljmp _SIO_ISR 433 ;-------------------------------------------------------- 434 ; global & static initialisations 435 ;-------------------------------------------------------- 436 .area HOME (CODE) 437 .area GSINIT (CODE) 438 .area GSFINAL (CODE) 439 .area GSINIT (CODE) 440 .globl __sdcc_gsinit_startup 441 .globl __sdcc_program_startup 442 .globl __start__stack 443 .globl __mcs51_genXINIT 444 .globl __mcs51_genXRAMCLEAR 445 .globl __mcs51_genRAMCLEAR 446 .area GSFINAL (CODE) 0000 02s00r26 447 ljmp __sdcc_program_startup 448 ;-------------------------------------------------------- 449 ; Home 450 ;-------------------------------------------------------- 451 .area HOME (CODE) 452 .area HOME (CODE) 0026 453 __sdcc_program_startup: 0026 12s01r8D 454 lcall _main 455 ; return from main will lock up 0029 80 FE 456 sjmp . 457 ;-------------------------------------------------------- 458 ; code 459 ;-------------------------------------------------------- 460 .area CSEG (CODE) 461 ;------------------------------------------------------------ 462 ;Allocation info for local variables in function 'moderes' 463 ;------------------------------------------------------------ 464 ; SRC/test_sio.c:33: void moderes() { 465 ; ----------------------------------------- 466 ; function moderes 467 ; ----------------------------------------- 0000 468 _moderes: 0007 469 ar7 = 0x07 0006 470 ar6 = 0x06 0005 471 ar5 = 0x05 0004 472 ar4 = 0x04 0003 473 ar3 = 0x03 0002 474 ar2 = 0x02 0001 475 ar1 = 0x01 0000 476 ar0 = 0x00 477 ; SRC/test_sio.c:34: mode = 1; 0000 75*00 01 478 mov _mode,#0x01 479 ; SRC/test_sio.c:35: d1 = DEFAULT_VAL; 0003 75*02 FF 480 mov _d1,#0xFF 481 ; SRC/test_sio.c:36: d2 = DEFAULT_VAL; 0006 75*03 FF 482 mov _d2,#0xFF 483 ; SRC/test_sio.c:37: result = DEFAULT_VAL; 0009 75*01 FF 484 mov _result,#0xFF 000C 22 485 ret 486 ;------------------------------------------------------------ 487 ;Allocation info for local variables in function 'mistake' 488 ;------------------------------------------------------------ 489 ; SRC/test_sio.c:50: void mistake() { 490 ; ----------------------------------------- 491 ; function mistake 492 ; ----------------------------------------- 000D 493 _mistake: 494 ; SRC/test_sio.c:51: EA = 0; 000D C2 AF 495 clr _EA 496 ; SRC/test_sio.c:52: ES = 0; 000F C2 AC 497 clr _ES 498 ; SRC/test_sio.c:53: type ( "Mistake has happend\n" ); 0011 90s00r00 499 mov dptr,#__str_0 0014 75 F0 80 500 mov b,#0x80 0017 12s00r00 501 lcall _type 502 ; SRC/test_sio.c:54: leds( DEFAULT_VAL ); 001A 75 82 FF 503 mov dpl,#0xFF 001D 12s00r00 504 lcall _leds 505 ; SRC/test_sio.c:55: moderes(); 0020 12s00r00 506 lcall _moderes 507 ; SRC/test_sio.c:56: EA = 1; 0023 D2 AF 508 setb _EA 509 ; SRC/test_sio.c:57: ES = 1; 0025 D2 AC 510 setb _ES 0027 22 511 ret 512 ;------------------------------------------------------------ 513 ;Allocation info for local variables in function 'SIO_ISR' 514 ;------------------------------------------------------------ 515 ;r_buf Allocated to registers r7 516 ;------------------------------------------------------------ 517 ; SRC/test_sio.c:75: void SIO_ISR( void ) __interrupt ( 4 ) 518 ; ----------------------------------------- 519 ; function SIO_ISR 520 ; ----------------------------------------- 0028 521 _SIO_ISR: 0028 C0*00 522 push bits 002A C0 E0 523 push acc 002C C0 F0 524 push b 002E C0 82 525 push dpl 0030 C0 83 526 push dph 0032 C0 07 527 push (0+7) 0034 C0 06 528 push (0+6) 0036 C0 05 529 push (0+5) 0038 C0 04 530 push (0+4) 003A C0 03 531 push (0+3) 003C C0 02 532 push (0+2) 003E C0 01 533 push (0+1) 0040 C0 00 534 push (0+0) 0042 C0 D0 535 push psw 0044 75 D0 00 536 mov psw,#0x00 537 ; SRC/test_sio.c:80: if( TI ) 0047 30 99 3B 538 jnb _TI,00110$ 539 ; SRC/test_sio.c:83: if ( result != DEFAULT_VAL ) 004A 74 FF 540 mov a,#0xFF 004C B5*01 02 541 cjne a,_result,00183$ 004F 80 34 542 sjmp 00110$ 0051 543 00183$: 544 ; SRC/test_sio.c:87: if ( result > MAX_RESULT ) 0051 E5*01 545 mov a,_result 0053 24 9C 546 add a,#0xff - 0x63 0055 50 08 547 jnc 00105$ 548 ; SRC/test_sio.c:89: SBUF = NEWLINE; 0057 75 99 0A 549 mov _SBUF,#0x0A 550 ; SRC/test_sio.c:90: moderes(); 005A 12s00r00 551 lcall _moderes 005D 80 24 552 sjmp 00106$ 005F 553 00105$: 554 ; SRC/test_sio.c:93: else if ( result >= 10 ) 005F 74 F6 555 mov a,#0x100 - 0x0A 0061 25*01 556 add a,_result 0063 50 15 557 jnc 00102$ 558 ; SRC/test_sio.c:95: SBUF = ( result / 10 ) + 0x30; 0065 75 F0 0A 559 mov b,#0x0A 0068 E5*01 560 mov a,_result 006A 84 561 div ab 006B 24 30 562 add a,#0x30 006D F5 99 563 mov _SBUF,a 564 ; SRC/test_sio.c:96: result = result % 10; 006F 75 F0 0A 565 mov b,#0x0A 0072 E5*01 566 mov a,_result 0074 84 567 div ab 0075 85 F0*01 568 mov _result,b 0078 80 09 569 sjmp 00106$ 007A 570 00102$: 571 ; SRC/test_sio.c:101: SBUF = result + 0x30; 007A 74 30 572 mov a,#0x30 007C 25*01 573 add a,_result 007E F5 99 574 mov _SBUF,a 575 ; SRC/test_sio.c:102: result = 0xAA; 0080 75*01 AA 576 mov _result,#0xAA 0083 577 00106$: 578 ; SRC/test_sio.c:104: TI = 0; 0083 C2 99 579 clr _TI 0085 580 00110$: 581 ; SRC/test_sio.c:109: if( RI ) 0085 20 98 03 582 jb _RI,00186$ 0088 02s01r38 583 ljmp 00144$ 008B 584 00186$: 585 ; SRC/test_sio.c:111: r_buf = SBUF; 008B AF 99 586 mov r7,_SBUF 587 ; SRC/test_sio.c:112: leds( r_buf ); //Подсветка считанного символа для debug 008D 8F 82 588 mov dpl,r7 008F C0 07 589 push ar7 0091 12s00r00 590 lcall _leds 0094 D0 07 591 pop ar7 592 ; SRC/test_sio.c:113: RI = 0; 0096 C2 98 593 clr _RI 594 ; SRC/test_sio.c:115: if ( r_buf >= 0x30 && r_buf <= 0x39 ) 0098 BF 30 00 595 cjne r7,#0x30,00187$ 009B 596 00187$: 009B 50 03 597 jnc 00188$ 009D 02s01r09 598 ljmp 00139$ 00A0 599 00188$: 00A0 EF 600 mov a,r7 00A1 24 C6 601 add a,#0xff - 0x39 00A3 40 64 602 jc 00139$ 603 ; SRC/test_sio.c:118: switch ( mode ) 00A5 74 01 604 mov a,#0x01 00A7 B5*00 02 605 cjne a,_mode,00190$ 00AA 80 07 606 sjmp 00111$ 00AC 607 00190$: 00AC 74 02 608 mov a,#0x02 609 ; SRC/test_sio.c:120: case 1: //Делимое 00AE B5*00 53 610 cjne a,_mode,00125$ 00B1 80 29 611 sjmp 00118$ 00B3 612 00111$: 613 ; SRC/test_sio.c:121: if ( d1 == DEFAULT_VAL ) //Первая считанная цифра 00B3 74 FF 614 mov a,#0xFF 00B5 B5*02 08 615 cjne a,_d1,00116$ 616 ; SRC/test_sio.c:122: d1 = ( r_buf - 0x30 ); 00B8 EF 617 mov a,r7 00B9 24 D0 618 add a,#0xD0 00BB F5*02 619 mov _d1,a 00BD 02s01r38 620 ljmp 00144$ 00C0 621 00116$: 622 ; SRC/test_sio.c:123: else if ( d1 < 10 ) //Вторая считанная цифра 00C0 74 F6 623 mov a,#0x100 - 0x0A 00C2 25*02 624 add a,_d1 00C4 40 11 625 jc 00113$ 626 ; SRC/test_sio.c:125: d1 *= 10; 00C6 E5*02 627 mov a,_d1 00C8 75 F0 0A 628 mov b,#0x0A 00CB A4 629 mul ab 00CC F5*02 630 mov _d1,a 631 ; SRC/test_sio.c:126: d1 += ( r_buf - 0x30 ); 00CE EF 632 mov a,r7 00CF 24 D0 633 add a,#0xD0 00D1 25*02 634 add a,_d1 00D3 F5*02 635 mov _d1,a 00D5 80 61 636 sjmp 00144$ 00D7 637 00113$: 638 ; SRC/test_sio.c:129: mistake(); 00D7 12s00r0D 639 lcall _mistake 640 ; SRC/test_sio.c:130: break; 641 ; SRC/test_sio.c:132: case 2: //Делитель 00DA 80 5C 642 sjmp 00144$ 00DC 643 00118$: 644 ; SRC/test_sio.c:133: if ( d2 == DEFAULT_VAL ) //Первая считанная цифра 00DC 74 FF 645 mov a,#0xFF 00DE B5*03 07 646 cjne a,_d2,00123$ 647 ; SRC/test_sio.c:134: d2 = ( r_buf - 0x30 ); 00E1 EF 648 mov a,r7 00E2 24 D0 649 add a,#0xD0 00E4 F5*03 650 mov _d2,a 00E6 80 50 651 sjmp 00144$ 00E8 652 00123$: 653 ; SRC/test_sio.c:135: else if (d2 < 10) //Вторая считанная цифра 00E8 74 F6 654 mov a,#0x100 - 0x0A 00EA 25*03 655 add a,_d2 00EC 40 11 656 jc 00120$ 657 ; SRC/test_sio.c:137: d2 *= 10; 00EE E5*03 658 mov a,_d2 00F0 75 F0 0A 659 mov b,#0x0A 00F3 A4 660 mul ab 00F4 F5*03 661 mov _d2,a 662 ; SRC/test_sio.c:138: d2 += ( r_buf - 0x30 ); 00F6 EF 663 mov a,r7 00F7 24 D0 664 add a,#0xD0 00F9 25*03 665 add a,_d2 00FB F5*03 666 mov _d2,a 00FD 80 39 667 sjmp 00144$ 00FF 668 00120$: 669 ; SRC/test_sio.c:141: mistake(); 00FF 12s00r0D 670 lcall _mistake 671 ; SRC/test_sio.c:142: break; 672 ; SRC/test_sio.c:144: default: 0102 80 34 673 sjmp 00144$ 0104 674 00125$: 675 ; SRC/test_sio.c:145: mistake(); 0104 12s00r0D 676 lcall _mistake 677 ; SRC/test_sio.c:147: } 0107 80 2F 678 sjmp 00144$ 0109 679 00139$: 680 ; SRC/test_sio.c:150: else if ( r_buf == '/' ) 0109 BF 2F 05 681 cjne r7,#0x2F,00136$ 682 ; SRC/test_sio.c:152: mode = 2; 010C 75*00 02 683 mov _mode,#0x02 010F 80 27 684 sjmp 00144$ 0111 685 00136$: 686 ; SRC/test_sio.c:155: else if ( r_buf == '=' ) 0111 BF 3D 21 687 cjne r7,#0x3D,00133$ 688 ; SRC/test_sio.c:158: if ( d1 < 100 && d2 > 0 && d2 < 100 ) 0114 74 9C 689 mov a,#0x100 - 0x64 0116 25*02 690 add a,_d1 0118 40 16 691 jc 00128$ 011A E5*03 692 mov a,_d2 011C 60 12 693 jz 00128$ 011E 74 9C 694 mov a,#0x100 - 0x64 0120 25*03 695 add a,_d2 0122 40 0C 696 jc 00128$ 697 ; SRC/test_sio.c:160: result = d1 / d2; 0124 85*03 F0 698 mov b,_d2 0127 E5*02 699 mov a,_d1 0129 84 700 div ab 012A F5*01 701 mov _result,a 702 ; SRC/test_sio.c:161: TI = 1; 012C D2 99 703 setb _TI 012E 80 08 704 sjmp 00144$ 0130 705 00128$: 706 ; SRC/test_sio.c:164: mistake(); 0130 12s00r0D 707 lcall _mistake 0133 80 03 708 sjmp 00144$ 0135 709 00133$: 710 ; SRC/test_sio.c:168: mistake(); 0135 12s00r0D 711 lcall _mistake 0138 712 00144$: 0138 D0 D0 713 pop psw 013A D0 00 714 pop (0+0) 013C D0 01 715 pop (0+1) 013E D0 02 716 pop (0+2) 0140 D0 03 717 pop (0+3) 0142 D0 04 718 pop (0+4) 0144 D0 05 719 pop (0+5) 0146 D0 06 720 pop (0+6) 0148 D0 07 721 pop (0+7) 014A D0 83 722 pop dph 014C D0 82 723 pop dpl 014E D0 F0 724 pop b 0150 D0 E0 725 pop acc 0152 D0*00 726 pop bits 0154 32 727 reti 728 ;------------------------------------------------------------ 729 ;Allocation info for local variables in function 'SetVector' 730 ;------------------------------------------------------------ 731 ;Vector Allocated to stack - _bp -5 732 ;Address Allocated to registers r6 r7 733 ;TmpVector Allocated to registers r6 r7 734 ;------------------------------------------------------------ 735 ; SRC/test_sio.c:185: void SetVector(unsigned char __xdata * Address, void * Vector) 736 ; ----------------------------------------- 737 ; function SetVector 738 ; ----------------------------------------- 0155 739 _SetVector: 0155 C0*00 740 push _bp 0157 85 81*00 741 mov _bp,sp 742 ; SRC/test_sio.c:190: *Address = 0x02; 015A AE 82 743 mov r6,dpl 015C AF 83 744 mov r7,dph 015E 74 02 745 mov a,#0x02 0160 F0 746 movx @dptr,a 747 ; SRC/test_sio.c:193: TmpVector = (unsigned char __xdata *) (Address + 1); 0161 0E 748 inc r6 0162 BE 00 01 749 cjne r6,#0x00,00103$ 0165 0F 750 inc r7 0166 751 00103$: 752 ; SRC/test_sio.c:194: *TmpVector = (unsigned char) ((unsigned short)Vector >> 8); 0166 E5*00 753 mov a,_bp 0168 24 FB 754 add a,#0xfb 016A F8 755 mov r0,a 016B 86 04 756 mov ar4,@r0 016D 08 757 inc r0 016E 86 05 758 mov ar5,@r0 0170 8D 04 759 mov ar4,r5 0172 8E 82 760 mov dpl,r6 0174 8F 83 761 mov dph,r7 0176 EC 762 mov a,r4 0177 F0 763 movx @dptr,a 0178 A3 764 inc dptr 0179 AE 82 765 mov r6,dpl 017B AF 83 766 mov r7,dph 767 ; SRC/test_sio.c:195: ++TmpVector; 768 ; SRC/test_sio.c:196: *TmpVector = (unsigned char) Vector; 017D E5*00 769 mov a,_bp 017F 24 FB 770 add a,#0xfb 0181 F8 771 mov r0,a 0182 86 05 772 mov ar5,@r0 0184 8E 82 773 mov dpl,r6 0186 8F 83 774 mov dph,r7 0188 ED 775 mov a,r5 0189 F0 776 movx @dptr,a 018A D0*00 777 pop _bp 018C 22 778 ret 779 ;------------------------------------------------------------ 780 ;Allocation info for local variables in function 'main' 781 ;------------------------------------------------------------ 782 ;dig Allocated to registers r7 783 ;i Allocated to registers r7 784 ;dipval Allocated to registers r7 785 ;------------------------------------------------------------ 786 ; SRC/test_sio.c:202: void main( void ) 787 ; ----------------------------------------- 788 ; function main 789 ; ----------------------------------------- 018D 790 _main: 791 ; SRC/test_sio.c:206: SetVector( 0x2023, (void *)SIO_ISR ); 018D 7Dr28 792 mov r5,#_SIO_ISR 018F 7Es00 793 mov r6,#(_SIO_ISR >> 8) 0191 7F 80 794 mov r7,#0x80 0193 C0 05 795 push ar5 0195 C0 06 796 push ar6 0197 C0 07 797 push ar7 0199 90 20 23 798 mov dptr,#0x2023 019C 12s01r55 799 lcall _SetVector 019F 15 81 800 dec sp 01A1 15 81 801 dec sp 01A3 15 81 802 dec sp 803 ; SRC/test_sio.c:207: init_sio( S2400 ); 01A5 75 82 F4 804 mov dpl,#0xF4 01A8 12s00r00 805 lcall _init_sio 806 ; SRC/test_sio.c:209: moderes(); 01AB 12s00r00 807 lcall _moderes 808 ; SRC/test_sio.c:212: while( 1 ) 01AE 809 00110$: 810 ; SRC/test_sio.c:214: dipval = readdip(); 01AE 12s00r00 811 lcall _readdip 01B1 AF 82 812 mov r7,dpl 813 ; SRC/test_sio.c:216: if ( dipval == DEFAULT_VAL ) 01B3 BF FF 33 814 cjne r7,#0xFF,00107$ 815 ; SRC/test_sio.c:219: EA = 0; 01B6 C2 AF 816 clr _EA 817 ; SRC/test_sio.c:220: ES = 0; 01B8 C2 AC 818 clr _ES 819 ; SRC/test_sio.c:222: if( rsiostat() ) 01BA 12s00r00 820 lcall _rsiostat 01BD E5 82 821 mov a,dpl 01BF 60 ED 822 jz 00110$ 823 ; SRC/test_sio.c:224: dig = rsio(); 01C1 12s00r00 824 lcall _rsio 01C4 AF 82 825 mov r7,dpl 826 ; SRC/test_sio.c:225: if ( dig >= 0x30 && dig <= 0x39 ) 01C6 BF 30 00 827 cjne r7,#0x30,00136$ 01C9 828 00136$: 01C9 40 E3 829 jc 00110$ 01CB EF 830 mov a,r7 01CC 24 C6 831 add a,#0xff - 0x39 01CE 40 DE 832 jc 00110$ 833 ; SRC/test_sio.c:227: for ( i = dig; i >= 0x30; i-- ) 01D0 834 00112$: 01D0 BF 30 00 835 cjne r7,#0x30,00139$ 01D3 836 00139$: 01D3 40 0C 837 jc 00115$ 838 ; SRC/test_sio.c:228: wsio(i); 01D5 8F 82 839 mov dpl,r7 01D7 C0 07 840 push ar7 01D9 12s00r00 841 lcall _wsio 01DC D0 07 842 pop ar7 843 ; SRC/test_sio.c:227: for ( i = dig; i >= 0x30; i-- ) 01DE 1F 844 dec r7 01DF 80 EF 845 sjmp 00112$ 01E1 846 00115$: 847 ; SRC/test_sio.c:230: wsio(NEWLINE); 01E1 75 82 0A 848 mov dpl,#0x0A 01E4 12s00r00 849 lcall _wsio 01E7 80 C5 850 sjmp 00110$ 01E9 851 00107$: 852 ; SRC/test_sio.c:237: EA=1; 01E9 D2 AF 853 setb _EA 854 ; SRC/test_sio.c:238: ES=1; 01EB D2 AC 855 setb _ES 01ED 80 BF 856 sjmp 00110$ 857 .area CSEG (CODE) 858 .area CONST (CODE) 0000 859 __str_0: 0000 4D 69 73 74 61 6B 860 .ascii "Mistake has happend" 65 20 68 61 73 20 68 61 70 70 65 6E 64 0013 0A 861 .db 0x0A 0014 00 862 .db 0x00 863 .area XINIT (CODE) 864 .area CABS (ABS,CODE)