2 /mips_system D:|Xilinux|Lab3|Lab3_1|mips_system.v/pipeline_inst - pipeline/execute_inst - ex_stage /mips_system D:|Xilinux|Lab3|Lab3_1|mips_system.v/pipeline_inst - pipeline/forwarding_inst - forwarding_unit /mips_system D:|Xilinux|Lab3|Lab3_1|mips_system.v/pipeline_inst - pipeline/idecode_inst - id_stage memory_inst - dp_memory (D:/Xilinux/Lab3/Lab3_1/dp_memory.v) 0 0 000000ff00000000000000010000000100000000000000000000000000000000020200000001000000010000006400000188000000020000000000000000000000000200000064ffffffff000000810000000300000002000001880000000100000003000000000000000100000003 true memory_inst - dp_memory (D:/Xilinux/Lab3/Lab3_1/dp_memory.v) 1 Design Utilities 0 0 000000ff00000000000000010000000100000000000000000000000000000000000000000000000125000000010000000100000000000000000000000064ffffffff000000810000000000000001000001250000000100000000 false 1 0 0 000000ff0000000000000001000000000000000001000000000000000000000000000000000000028e000000040101000100000000000000000000000064ffffffff000000810000000000000004000000420000000100000000000000240000000100000000000000660000000100000000000001c20000000100000000 false alu.v 1 work 0 0 000000ff00000000000000010000000000000000010000000000000000000000000000000000000109000000010001000100000000000000000000000064ffffffff000000810000000000000001000001090000000100000000 false work 1 Configure Target Device Design Utilities Implement Design Synthesize - XST User Constraints 0 0 000000ff00000000000000010000000100000000000000000000000000000000000000000000000125000000010000000100000000000000000000000064ffffffff000000810000000000000001000001250000000100000000 false 2 /testbench D:|Xilinux|Lab3|Lab3_1|testbench.v/uut - mips_system/pipeline_inst - pipeline/execute_inst - ex_stage /testbench D:|Xilinux|Lab3|Lab3_1|testbench.v/uut - mips_system/pipeline_inst - pipeline/forwarding_inst - forwarding_unit idecode_inst - id_stage (D:/Xilinux/Lab3/Lab3_1/id_stage.v) 4 0 000000ff0000000000000001000000010000000000000000000000000000000002020000000100000001000000640000019c000000020000000000000000000000000200000064ffffffff0000008100000003000000020000019c0000000100000003000000000000000100000003 true idecode_inst - id_stage (D:/Xilinux/Lab3/Lab3_1/id_stage.v) 1 Design Utilities 0 0 000000ff00000000000000010000000100000000000000000000000000000000000000000000000125000000010000000100000000000000000000000064ffffffff000000810000000000000001000001250000000100000000 false 1 Simulate Behavioral Model 0 0 000000ff00000000000000010000000100000000000000000000000000000000000000000000000125000000010000000100000000000000000000000064ffffffff000000810000000000000001000001250000000100000000 false Simulate Behavioral Model 000000ff00000000000000020000011b0000011b01000000050100000002 Behavioral Simulation