verilog work "regfile.v"
verilog work "control.v"
verilog work "alu_ctrl.v"
verilog work "alu.v"
verilog work "wb_stage.v"
verilog work "mem_stage.v"
verilog work "if_stage.v"
verilog work "id_stage.v"
verilog work "hazard_unit.v"
verilog work "forwarding_unit.v"
verilog work "ex_stage.v"
verilog work "pipeline.v"
verilog work "dp_memory.v"
verilog work "mips_system.v"
verilog work "testbench.v"
verilog work "D:/Xilinux/14.7/ISE_DS/ISE//verilog/src/glbl.v"