GENERATE(Exponential(10,0,0.01))  ; lambda_input
S_0 SEIZE UART_RX
    ADVANCE (Exponential(10,0,0.016667))  ; RX
    RELEASE UART_RX
    TEST L Q$RX_FIFO,16,DROP_Q            ; check current fifo size
    QUEUE RX_FIFO                         ; RX_FIFO
    SEIZE UART                            ; try to seize the uart module
    DEPART RX_FIFO                        ; decrease queue length
    TRANSFER 1000,,rS                     ; jump to the uart

S_2 SEIZE   UART

rS  ADVANCE (Exponential(10,0,0.00001))  ; UART
    RELEASE   UART
    TRANSFER .75,,S_3                    ; go to CPU queue with lambda_handle

S_1 TEST L Q$TX_FIFO,16,DROP_Q
    QUEUE TX_FIFO                        ; TX_FIFO
    SEIZE  UART_T_TX
    DEPART TX_FIFO
    ADVANCE (Exponential(10,0,0.016667)) ; TX
    RELEASE   UART_T_TX
    TERMINATE 1

    GENERATE(Exponential(10,0,0.01))     ; lambda_transmit

S_3 TEST L Q$CPU_FIFO,64,DROP_Q
    QUEUE CPU_FIFO                       ; CPU_queue
    SEIZE   CPU
    DEPART CPU_FIFO
    ADVANCE (Exponential(10,0,0.000001)) ; CPU
    RELEASE CPU
    TRANSFER .25,,S_2                    ; go to UART if lambda_transmit

S_4 TEST L Q$MEM_FIFO,32,DROP_Q
    QUEUE MEM_FIFO                       ; MEM_storage
    SEIZE MEM
    DEPART MEM_FIFO
    ADVANCE (Exponential(10,0,0.0001))
    RELEASE MEM
    TERMINATE 1

DROP_Q TERMINATE 1
    START 10000