GENERATE(Exponential(10,0,0.1))     ; lambda_input

S_0 ADVANCE (Exponential(10,0,0.0001))

S_2    QUEUE RX_FIFO                   ;   RX_FIFO
    SEIZE   UART
    ADVANCE (Exponential(10,0,0.00001))      ;UART
    RELEASE   UART
    TRANSFER .25,,S_1        ; go to TX_FIFO with lambda_transmit
    TRANSFER .75,,S_3        ; go to CPU queue with lambda_handle

S_1 QUEUE TX_FIFO           ; TX_FIFO
    SEIZE  UART_T_TX
    DEPART  TX_FIFO
    ADVANCE (Exponential(10,0,0.0001))   ; TX
    RELEASE   UART_T_TX
    TERMINATE

S_3 QUEUE CPU_FIFO     ; CPU_queue
    SEIZE   CPU
    DEPART  CPU_FIFO
    ADVANCE (Exponential(10,0,0.0000001))   ;CPU
    RELEASE CPU
    TRANSFER .75,,S_4 ; go to MEM_storage if lambda_write
    TRANSFER .25,,S_2 ; go to UART if lambda_transmit

S_4 QUEUE MEM_FIFO             ; MEM_storage
    SEIZE MEM
    DEPART  MEM_FIFO
    ADVANCE (Exponential(10,0,0.00001))           ; MEM
    RELEASE MEM
    TERMINATE